FSMDesigner

You can create finite state machines for your hardware projects.

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FSMDesigner is an open source C++ based implementation for a Finite State Machine (FSM) design tool with integrated Hardware Description Language (HDL) generation.

FSMDesigner uses the Simple-Moore FSM model guaranteeing efficient fast complex control circuits. You can also export your FSM to Verilog HDL or VHDL.

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Specifications
Developer:
Benjamin Bruno, Frank,Mondrian,Richard Leys
License type:
Open source